Making accurate impedance measurements is a necessity when developing models for modern power electronics systems. Creating models of power electronic circuits involving wide bandgap devices requires characterizing the parasitic impedance of the semiconductor packaging, such as multi-chip power modules. Impedance analyzers are one commercially available instrument for quantifying these parasitics across frequency. Unfortunately, power semiconductor packages have various and often complex geometries; many devices can only be measured accurately using custom fixtures. All fixtures introduce systematic error into measurements, and failure to quantify the error of custom fixtures can lead to over-estimation of measurement accuracy. This thesis presents a measurement-based methodology for quantifying the error introduced by custom fixtures. This approach is validated through comparisons involving a commercially available test fixture with published error values. The contributions of the error are analyzed to custom fixtures and measurement techniques for low-impedance measurands. To this end, a method of external compensation is proposed. This technique is used to evaluate the relationship between fixture parasitics, measurand impedance, and fixture-induced measurement error. The result of this analysis is that, while increased fixture parasitics do increase the potential for error, the primary contribution to measurement error is the consistency of the measurement setup between compensation and measurement.